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| Categories | Programmable IC Chip | 
|---|---|
| Brand Name: | XILINX / AMD | 
| Model Number: | XC95144XL-10TQG144C | 
| Place of Origin: | original | 
| MOQ: | 1 | 
| Price: | Negotiable | 
| Payment Terms: | L/C, D/A, D/P, T/T, Western Union, MoneyGram | 
| Supply Ability: | 999999 | 
| Delivery Time: | 1-3 days | 
| Packaging Details: | standard | 
| Delay Time tpd(1) Max: | 10 ns | 
| Voltage Supply - Internal: | 3V ~ 3.6V | 
| Number of Logic Elements/Blocks: | 8 | 
| Number of Macrocells: | 144 | 
| Number of Gates: | 3200 | 
| Operating Temperature: | 0°C ~ 70°C (TA) | 
XC95144XL-10TQG144C Programmable IC Chip High Performance CPLD computing systems Package 144-TQFP
Delay Time tpd(1) Max  | 10 ns  | |
Voltage Supply - Internal  | 3V ~ 3.6V  | |
Number of Logic Elements/Blocks  | 8  | |
Number of Macrocells  | 144  | |
Number of Gates  | 3200  | |
Number of I/O  | 117  | |
Operating Temperature  | 0°C ~ 70°C (TA)  | |
Mounting Type  | Surface Mount  | |
Package / Case  | 144-LQFP  | |
Supplier Device Package  | 144-TQFP (20x20)  | 
Features:
• 5 ns pin-to-pin logic delays
• System frequency up to 178 MHz
• 144 macrocells with 3,200 usable gates
• Available in small footprint packages
- 100-pin TQFP (81 user I/O pins)
- 144-pin TQFP (117 user I/O pins)
- 144-CSP (117 user I/O pins)
- Pb-free available for all packages
• Optimized for high-performance 3.3V systems
- Low power operation
- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V
signals
- 3.3V or 2.5V output capability
- Advanced 0.35 micron feature size CMOS
Fast FLASH™ technology
• Advanced system features
- In-system programmable
- Superior pin-locking and routability with
Fast CONNECT™ II switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with
individual product-term allocation
- Local clock inversion with three global and one
product-term clocks
- Individual output enable per output pin with local
inversion
- Input hysteresis on all user and boundary-scan pin
inputs
- Bus-hold circuitry on all user pin inputs
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
• Fast concurrent programming
• Slew rate control on individual outputs
• Enhanced data security features
• Excellent quality and reliability
- Endurance exceeding 10,000 program/erase
cycles
- 20 year data retention
- ESD protection exceeding 2,000V
• Pin-compatible with 5V-core XC95144 device in the
100-pin TQFP package
WARNING: Programming temperature range of
TA = 0° C to +70° C
Description:
The XC95144XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns.

                                 
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