| Sign In | Join Free | My entremaqueros.com |
|
| Categories | Field Programmable Gate Array |
|---|---|
| Brand Name: | Xilinx Inc. |
| Model Number: | XC4VSX55-10FF1148I |
| Certification: | Lead free / RoHS Compliant |
| MOQ: | 1 pcs |
| Price: | USD 1500~2000 pcs |
| Payment Terms: | T/T, Western Union, Paypal, Trade Assurance, Credit Card |
| Supply Ability: | 328 pcs |
| Delivery Time: | 3-5 Day |
| Packaging Details: | International Standard Packaging |
| Category: | Embedded - FPGAs |
| Condition: | Original 100%,Brand New and Original,New |
| Number of I/Os: | 640 I/O |
| Product: | Virtex-4 |
| Package / Case: | FCBGA-1148 |
| Distributed RAM: | 384 kbit |
| Embedded Block RAM - EBR: | 5760 kbit |
| Maximum Operating Frequency: | 500 MHz |
| Service: | BOM Kitting |
| Lead time: | In Stock,contact us |
XC4VSX55-10FF1148I Field Programmable Gate Array 1148FCBGA FPGA
| Product Attribute | Attribute Value |
|---|---|
| Xilinx | |
| FPGA - Field Programmable Gate Array | |
| Virtex-4 | |
| 55296 | |
| 640 I/O | |
| 1.2 V | |
| - 40 C | |
| + 100 C | |
| SMD/SMT | |
| FCBGA-1148 | |
| Series: | XC4VSX55 |
| Brand: | Xilinx |
| Distributed RAM: | 384 kbit |
| Embedded Block RAM - EBR: | 5760 kbit |
| Maximum Operating Frequency: | 500 MHz |
| Moisture Sensitive: | Yes |
| Product Type: | FPGA - Field Programmable Gate Array |
| Factory Pack Quantity: | 1 |
| Subcategory: | Programmable Logic ICs |
• Three Families — LX/SX/FX
- Virtex-4 LX: High-performance logic applications solution
- Virtex-4 SX: High-performance solution for digital signal
processing (DSP) applications
- Virtex-4 FX: High-performance, full-featured solution for
embedded platform applications
• Xesium™ Clock Technology
- Digital clock manager (DCM) blocks
- Additional phase-matched clock dividers (PMCD)
- Differential global clocks
• XtremeDSP™ Slice
- 18 x 18, two’s complement, signed Multiplier
- Optional pipeline stages
- Built-in Accumulator (48-bit) and Adder/Subtracter
• Smart RAM Memory Hierarchy
- Distributed RAM
- Dual-port 18-Kbit RAM blocks
· Optional pipeline stages
· Optional programmable FIFO logic automatically remaps RAM signals
as FIFO signals
- High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II,
and RLDRAM-II.

|